Pip
Architecture-dependent parts of Pip: MAL, IAL and boot
pic8259.h
Go to the documentation of this file.
1 /*******************************************************************************/
2 /* © Université de Lille, The Pip Development Team (2015-2021) */
3 /* */
4 /* This software is a computer program whose purpose is to run a minimal, */
5 /* hypervisor relying on proven properties such as memory isolation. */
6 /* */
7 /* This software is governed by the CeCILL license under French law and */
8 /* abiding by the rules of distribution of free software. You can use, */
9 /* modify and/ or redistribute the software under the terms of the CeCILL */
10 /* license as circulated by CEA, CNRS and INRIA at the following URL */
11 /* "http://www.cecill.info". */
12 /* */
13 /* As a counterpart to the access to the source code and rights to copy, */
14 /* modify and redistribute granted by the license, users are provided only */
15 /* with a limited warranty and the software's author, the holder of the */
16 /* economic rights, and the successive licensors have only limited */
17 /* liability. */
18 /* */
19 /* In this respect, the user's attention is drawn to the risks associated */
20 /* with loading, using, modifying and/or developing or reproducing the */
21 /* software by the user in light of its specific status of free software, */
22 /* that may mean that it is complicated to manipulate, and that also */
23 /* therefore means that it is reserved for developers and experienced */
24 /* professionals having in-depth computer knowledge. Users are therefore */
25 /* encouraged to load and test the software's suitability as regards their */
26 /* requirements in conditions enabling the security of their systems and/or */
27 /* data to be ensured and, more generally, to use and operate it in the */
28 /* same conditions as regards security. */
29 /* */
30 /* The fact that you are presently reading this means that you have had */
31 /* knowledge of the CeCILL license and that you accept its terms. */
32 /*******************************************************************************/
33 
39 #ifndef PIC8259_H
40 #define PIC8259_H
41 
42 #define PIC1 0x20 /* IO base address for master PIC */
43 #define PIC2 0xA0 /* IO base address for slave PIC */
44 #define PIC1_COMMAND PIC1
45 #define PIC1_DATA (PIC1+1)
46 #define PIC2_COMMAND PIC2
47 #define PIC2_DATA (PIC2+1)
48 #define ICW1_ICW4 0x01 /* ICW4 (not) needed */
49 #define ICW1_SINGLE 0x02 /* Single (cascade) mode */
50 #define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
51 #define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
52 #define ICW1_INIT 0x10 /* Initialization - required! */
53 
54 #define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
55 #define ICW4_AUTO 0x02 /* Auto (normal) EOI */
56 #define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
57 #define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
58 #define ICW4_SFNM 0x10 /* Special fully nested (not) */
59 #define PIC_EOI 0x20
60 
61 #endif