Pip
Architecture-dependent parts of Pip: MAL, IAL and boot
src
arch
x86_multiboot
boot
include
pic8259.h
Go to the documentation of this file.
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/*******************************************************************************/
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/* © Université de Lille, The Pip Development Team (2015-2021) */
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/* */
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/* This software is a computer program whose purpose is to run a minimal, */
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/* hypervisor relying on proven properties such as memory isolation. */
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/* */
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/* This software is governed by the CeCILL license under French law and */
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/* abiding by the rules of distribution of free software. You can use, */
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/* modify and/ or redistribute the software under the terms of the CeCILL */
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/* license as circulated by CEA, CNRS and INRIA at the following URL */
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/* "http://www.cecill.info". */
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/* */
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/* As a counterpart to the access to the source code and rights to copy, */
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/* modify and redistribute granted by the license, users are provided only */
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/* with a limited warranty and the software's author, the holder of the */
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/* economic rights, and the successive licensors have only limited */
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/* liability. */
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/* */
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/* In this respect, the user's attention is drawn to the risks associated */
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/* with loading, using, modifying and/or developing or reproducing the */
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/* software by the user in light of its specific status of free software, */
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/* that may mean that it is complicated to manipulate, and that also */
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/* therefore means that it is reserved for developers and experienced */
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/* professionals having in-depth computer knowledge. Users are therefore */
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/* encouraged to load and test the software's suitability as regards their */
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/* requirements in conditions enabling the security of their systems and/or */
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/* data to be ensured and, more generally, to use and operate it in the */
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/* same conditions as regards security. */
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/* */
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/* The fact that you are presently reading this means that you have had */
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/* knowledge of the CeCILL license and that you accept its terms. */
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/*******************************************************************************/
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#ifndef PIC8259_H
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#define PIC8259_H
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#define PIC1 0x20
/* IO base address for master PIC */
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#define PIC2 0xA0
/* IO base address for slave PIC */
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#define PIC1_COMMAND PIC1
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#define PIC1_DATA (PIC1+1)
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#define PIC2_COMMAND PIC2
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#define PIC2_DATA (PIC2+1)
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#define ICW1_ICW4 0x01
/* ICW4 (not) needed */
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#define ICW1_SINGLE 0x02
/* Single (cascade) mode */
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#define ICW1_INTERVAL4 0x04
/* Call address interval 4 (8) */
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#define ICW1_LEVEL 0x08
/* Level triggered (edge) mode */
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#define ICW1_INIT 0x10
/* Initialization - required! */
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#define ICW4_8086 0x01
/* 8086/88 (MCS-80/85) mode */
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#define ICW4_AUTO 0x02
/* Auto (normal) EOI */
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#define ICW4_BUF_SLAVE 0x08
/* Buffered mode/slave */
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#define ICW4_BUF_MASTER 0x0C
/* Buffered mode/master */
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#define ICW4_SFNM 0x10
/* Special fully nested (not) */
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#define PIC_EOI 0x20
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#endif
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