Pip
Architecture-dependent parts of Pip: MAL, IAL and boot
src
arch
x86_multiboot
boot
include
idt.h
Go to the documentation of this file.
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/*******************************************************************************/
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/* © Université de Lille, The Pip Development Team (2015-2021) */
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/* */
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/* This software is a computer program whose purpose is to run a minimal, */
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/* hypervisor relying on proven properties such as memory isolation. */
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/* */
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/* This software is governed by the CeCILL license under French law and */
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/* abiding by the rules of distribution of free software. You can use, */
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/* modify and/ or redistribute the software under the terms of the CeCILL */
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/* license as circulated by CEA, CNRS and INRIA at the following URL */
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/* "http://www.cecill.info". */
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/* */
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/* As a counterpart to the access to the source code and rights to copy, */
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/* modify and redistribute granted by the license, users are provided only */
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/* with a limited warranty and the software's author, the holder of the */
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/* economic rights, and the successive licensors have only limited */
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/* liability. */
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/* */
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/* In this respect, the user's attention is drawn to the risks associated */
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/* with loading, using, modifying and/or developing or reproducing the */
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/* software by the user in light of its specific status of free software, */
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/* that may mean that it is complicated to manipulate, and that also */
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/* therefore means that it is reserved for developers and experienced */
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/* professionals having in-depth computer knowledge. Users are therefore */
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/* encouraged to load and test the software's suitability as regards their */
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/* requirements in conditions enabling the security of their systems and/or */
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/* data to be ensured and, more generally, to use and operate it in the */
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/* same conditions as regards security. */
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/* */
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/* The fact that you are presently reading this means that you have had */
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/* knowledge of the CeCILL license and that you accept its terms. */
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/*******************************************************************************/
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#ifndef __IDT__
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#define __IDT__
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#include <stdint.h>
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struct
idt_int_trap_entry_s
{
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unsigned
offset_low
: 16;
//<! Lower bits of handler address
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unsigned
segment
: 16;
//<! Segment selector
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unsigned
rfu
: 5;
//<! Reserved
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unsigned
zero
: 3;
//<! Always zero smh
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unsigned
type
: 5;
//<! TRAP_GATE_TYPE or INTERRUPT_GATE_TYPE
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unsigned
dpl
: 2;
//<! Descriptor Privilege Level
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unsigned
present
: 1;
//<! Present flag (validity)
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unsigned
offset_high
: 16;
//<! Higher bits of handler address
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};
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typedef
struct
idt_int_trap_entry_s
idt_trap_entry_t
;
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typedef
struct
idt_int_trap_entry_s
idt_int_entry_t
;
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struct
idt_task_entry_s
{
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unsigned
rfu0
: 16;
//<! Reserved
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unsigned
segment
: 16;
//<! TSS segment selector
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unsigned
rfu1
: 8;
//<! Reserved
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unsigned
type
: 5;
//<! TASK_GATE_TYPE
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unsigned
dpl
: 2;
//<! Descriptor Privilege Level
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unsigned
present
: 1;
//<! Present flag (validity)
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unsigned
rfu2
: 16;
//<! Reserved
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};
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typedef
struct
idt_task_entry_s
idt_task_entry_t
;
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union
idt_entry_u
{
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idt_int_entry_t
interrupt
;
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idt_trap_entry_t
trap
;
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idt_task_entry_t
task
;
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};
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typedef
union
idt_entry_u
idt_entry_t
;
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#define TASK_GATE_TYPE 0b00101
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#define INTERRUPT_GATE_TYPE 0b01110
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#define TRAP_GATE_TYPE 0b01111
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struct
idt_ptr_s
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{
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uint16_t
limit
;
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idt_entry_t
*
base
;
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}
__attribute__
((packed));
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typedef
struct
idt_ptr_s
idt_ptr_t
;
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void
idt_init
(
void
);
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#endif
idt_int_trap_entry_s::offset_low
unsigned offset_low
Definition:
idt.h:44
idt_ptr_s::base
idt_entry_t * base
IDT pointer base.
Definition:
idt.h:94
idt_task_entry_s::present
unsigned present
Definition:
idt.h:67
idt_int_trap_entry_s
Definition:
idt.h:43
idt_entry_u
Interrupt Descriptor Table entry.
Definition:
idt.h:76
idt_int_trap_entry_s::type
unsigned type
Definition:
idt.h:48
idt_task_entry_s
Interrupt Descriptor Table Task entry struct.
Definition:
idt.h:61
idt_init
void idt_init(void)
Definition:
idt.c:726
__attribute__
struct idt_ptr_s __attribute__((packed))
idt_int_trap_entry_s::dpl
unsigned dpl
Definition:
idt.h:49
idt_task_entry_s::rfu0
unsigned rfu0
Definition:
idt.h:62
idt_int_trap_entry_s::zero
unsigned zero
Definition:
idt.h:47
idt_entry_u::interrupt
idt_int_entry_t interrupt
Definition:
idt.h:77
idt_entry_u::trap
idt_trap_entry_t trap
Definition:
idt.h:78
idt_int_trap_entry_s::offset_high
unsigned offset_high
Definition:
idt.h:51
idt_int_trap_entry_s::segment
unsigned segment
Definition:
idt.h:45
idt_task_entry_s::rfu1
unsigned rfu1
Definition:
idt.h:64
idt_task_entry_s::dpl
unsigned dpl
Definition:
idt.h:66
idt_int_trap_entry_s::rfu
unsigned rfu
Definition:
idt.h:46
idt_task_entry_s::rfu2
unsigned rfu2
Definition:
idt.h:68
idt_task_entry_s::segment
unsigned segment
Definition:
idt.h:63
idt_ptr_s::limit
uint16_t limit
Address limit.
Definition:
idt.h:93
idt_int_trap_entry_s::present
unsigned present
Definition:
idt.h:50
idt_task_entry_s::type
unsigned type
Definition:
idt.h:65
idt_ptr_s
Definition:
idt.h:91
idt_entry_u::task
idt_task_entry_t task
Definition:
idt.h:79
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