Pip
Architecture-dependent parts of Pip: MAL, IAL and boot
src
arch
armv7
boot
include
context.h
Go to the documentation of this file.
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/*******************************************************************************/
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/* © Université de Lille, The Pip Development Team (2015-2021) */
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/* */
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/* This software is a computer program whose purpose is to run a minimal, */
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/* hypervisor relying on proven properties such as memory isolation. */
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/* */
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/* This software is governed by the CeCILL license under French law and */
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/* abiding by the rules of distribution of free software. You can use, */
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/* modify and/ or redistribute the software under the terms of the CeCILL */
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/* license as circulated by CEA, CNRS and INRIA at the following URL */
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/* "http://www.cecill.info". */
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/* */
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/* As a counterpart to the access to the source code and rights to copy, */
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/* modify and redistribute granted by the license, users are provided only */
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/* with a limited warranty and the software's author, the holder of the */
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/* economic rights, and the successive licensors have only limited */
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/* liability. */
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/* */
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/* In this respect, the user's attention is drawn to the risks associated */
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/* with loading, using, modifying and/or developing or reproducing the */
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/* software by the user in light of its specific status of free software, */
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/* that may mean that it is complicated to manipulate, and that also */
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/* therefore means that it is reserved for developers and experienced */
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/* professionals having in-depth computer knowledge. Users are therefore */
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/* encouraged to load and test the software's suitability as regards their */
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/* requirements in conditions enabling the security of their systems and/or */
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/* data to be ensured and, more generally, to use and operate it in the */
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/* same conditions as regards security. */
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/* */
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/* The fact that you are presently reading this means that you have had */
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/* knowledge of the CeCILL license and that you accept its terms. */
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/*******************************************************************************/
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#ifndef DEF_CONTEXT_H_
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#define DEF_CONTEXT_H_
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#include <stdint.h>
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typedef
enum
arm_ctxreg_e
{
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CTX_SP
,
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CTX_LR
,
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CTX_R0
,
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CTX_R1
,
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CTX_R2
,
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CTX_R3
,
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CTX_R4
,
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CTX_R5
,
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CTX_R6
,
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CTX_R7
,
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CTX_R8
,
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CTX_R9
,
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CTX_R10
,
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CTX_R11
,
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CTX_R12
,
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CTX_PC
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}
arm_ctxreg_t
;
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typedef
struct
gate_ctx_s
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{
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uint32_t
spsr
;
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uint32_t
reg
[16];
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}
arm_ctx_t
,
gate_ctx_t
;
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typedef
struct
user_ctx_s
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{
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uint32_t
spsr
;
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uint32_t
reg
[16];
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uint32_t
pipflags
;
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uint32_t
valid
;
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}
user_ctx_t
;
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#endif
user_ctx_s
User saved context.
Definition:
context.h:72
CTX_SP
Definition:
context.h:40
CTX_LR
Definition:
context.h:41
CTX_R7
Definition:
context.h:49
gate_ctx_s
Definition:
context.h:62
user_ctx_s::pipflags
uint32_t pipflags
Definition:
context.h:76
user_ctx_s::valid
uint32_t valid
Definition:
context.h:77
CTX_R9
Definition:
context.h:51
CTX_R4
Definition:
context.h:46
CTX_R8
Definition:
context.h:50
user_ctx_t
struct user_ctx_s user_ctx_t
CTX_R6
Definition:
context.h:48
CTX_R0
Definition:
context.h:42
arm_ctx_t
struct gate_ctx_s arm_ctx_t
gate_ctx_t
struct gate_ctx_s gate_ctx_t
CTX_R2
Definition:
context.h:44
CTX_R3
Definition:
context.h:45
CTX_R5
Definition:
context.h:47
user_ctx_s::spsr
uint32_t spsr
Definition:
context.h:74
gate_ctx_s::spsr
uint32_t spsr
Definition:
context.h:64
CTX_R10
Definition:
context.h:52
CTX_R1
Definition:
context.h:43
gate_ctx_s::reg
uint32_t reg[16]
Definition:
context.h:65
arm_ctxreg_e
arm_ctxreg_e
Definition:
context.h:39
arm_ctxreg_t
enum arm_ctxreg_e arm_ctxreg_t
CTX_PC
Definition:
context.h:55
CTX_R11
Definition:
context.h:53
CTX_R12
Definition:
context.h:54
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