Pip
Architecture-dependent parts of Pip: MAL, IAL and boot
Data Structures
Here are the data structures with brief descriptions:
 Ccallgate_descriptor_sA callgate descriptor for the GDT/LDT Intel 64 and IA-32 Architectures Software Developer's Manual - Vol. 3a - Sec. 5.8.3 and Fig. 5.8
 CfpinfoFirst partition info structure
 Cfpinfo_deviceRepresents a device, as probed by IAL
 Cfpinfo_pci_extendedinfoDescribes a PCI device (leaves the further parsing up to the partition)
 Cfpinfotag_hwFirst partition info, hardware section
 Cgate_ctx_s
 Cgate_stack_sStack context from callgate after assembly magic
 Cgdt_entry
 Cgdt_ptrPointer to the GDT
 Chardware_defPlatform-specific hardware memory range definition
 Cidt_callback_conf_s
 Cidt_entry_uInterrupt Descriptor Table entry
 Cidt_int_trap_entryInterrupt Descriptor Table Trap and Interrupt entry common struct
 Cidt_int_trap_entry_s
 Cidt_ptr_s
 Cidt_ptr_structIDT pointer structure
 Cidt_task_entry_sInterrupt Descriptor Table Task entry struct
 Cint_ctx_s
 Cint_stack_sStack context from interrupt/exception
 Ciret_ctx_s
 Cmmu_sd_pt_s
 Cmmu_sd_sec_s
 Cmmu_sd_sp_s
 Cmmu_sd_ssec_s
 CmultibootMultiboot header info
 Cmultiboot_memory_mapMemory map structure
 Cout_fct_wrap_type
 Cpage_directoryPage Directory structure Pointing to short-descriptor page table
 Cpage_tablePage Table structure Pointing to short-descriptor small-page
 Cpage_table_entryPage Table entry structure
 Cpartition_idPartition-to-PartitionID structure
 Cpushad_regs_s
 Creg_clidr_u
 Creg_csidr_u
 Creg_ctr_u
 Creg_midr_u
 Creg_mmfr0_u
 Creg_ttbcr_u
 CregistersRegisters structure for x86
 Csegment_descriptor_sMeant to be written inside the GDT. Provides the processor with the size and location of a segment, as well as access control and status information
 Ctss_descriptor_s
 Ctss_sTask State Segment structure
 Cuser_ctx_sUser saved context